Download Chemistry in Microelectronics by Yannick Le Tiec PDF

By Yannick Le Tiec

Microelectronics is a posh international the place many sciences have to collaborate to create nano-objects: we want services in electronics, microelectronics, physics, optics and mechanics additionally crossing into chemistry, electrochemistry, in addition to biology, biochemistry and medication. Chemistry is curious about many fields from fabrics, chemical substances, gases, beverages or salts, the fundamentals of reactions and equilibrium, to the optimized cleansing of surfaces and selective etching of particular layers. additionally, over fresh a long time, the dimensions of the transistors has been enormously decreased whereas the performance of circuits has elevated. This publication includes 5 chapters masking the chemical substances and sequences utilized in processing, from cleansing to etching, the function and influence in their purity, in addition to the fabrics utilized in “Front finish Of the road” which corresponds to the center and function of person transistors, then relocating directly to the “Back finish Of the road” that is concerning the interconnection of all of the transistors. ultimately, the necessity for particular functionalization additionally calls for key wisdom on floor remedies and chemical administration to permit new applications.

Contents

1. Chemistry within the “Front finish of the road” (FEOL): Deposits, Gate Stacks, Epitaxy and Contacts, François Martin, Jean-Michel Hartmann, Véronique Carron and Yannick Le Tiec.
2. Chemistry in Interconnects, Vincent Jousseaume, Paul-Henri Haumesser, Carole Pernel, Jeffery Butterbaugh, Sylvain Maîtrejean and Didier Louis.
3. The Chemistry of rainy floor coaching: cleansing, Etching and Drying, Yannick Le Tiec and Martin Knotter.
4. The Use and administration of Chemical Fluids in Microelectronics, Christiane Gottschalk, Kevin Mclaughlin, Julie Cren, Catherine Peyne and Patrick Valenti.
5. floor Functionalization for Micro- and Nanosystems: software to Biosensors, Antoine Hoang, Gilles Marchand, Guillaume Nonglaton, Isabelle Texier-Nogues and Francoise Vinet.

About the Authors

Yannick Le Tiec is a technical specialist at CEA-Leti, Minatec considering the fact that 2002. he's a CEA-Leti assignee at IBM, Albany (NY) to enhance the complicated 14 nm CMOS node and the FDSOI expertise. He held various technical positions from the complicated three hundred mm SOI CMOS pilot line to diversified assignments inside SOITEC for complex wafer improvement and later inside of INES to optimize sun cellphone ramp-up and yield. He has been a part of the ITRS entrance finish technical operating workforce at ITRS considering the fact that 2008.

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16. 16. After A an “HF--last” wet cleeaning, the suurface is 28 Chemistry in Microelectronics structured. After H2 bake at 750°C, short terraces delimited by bi-atomic steps appear. 14, the appearance of monoatomic steps that are alternatively smooth (SA type) and rough (SB type) and that delimit several dozens of nm wide (2 × 1) or (1 × 2) reconstructed terraces [VOI 97]. It is interesting to note that the H2 bake threshold temperature (between 750 and 775°C for Si (001)), above which the C, O and F surface contamination is eliminated, does not seem to be influenced by the crystallographic orientation of the Si surface.

If these criteria are not followed d, moat recesss and island ding of the fiilms will take plaace [ISH 02]]. It is also wise w to optim mize the pow wer delivereed to the lamps used u to heatt up the SO OI substrates so that thee temperaturre at the surface is uniform; otherwise o sliip lines will form. f The surface prep paration desccribed here (w where a nativ ve or chemiccal oxide present at the surfacce is removed d by in situ H2 bake in su uitable condiitions) is m being univ versal given the t high therrmal budgetss needed.

However, for high Ge concentrations, certain layers seen as pseudomorphic in XRD are actually characterized by the presence of a limited amount of misfit dislocations in their midst. 13). 3. Surface preparation prior to epitaxy The substrate surface preparation that precedes any kind of epitaxy is of paramount importance. The goal is indeed to elongate the atomic columns of the substrate into the layer. The presence of amorphous silicon oxide layers (even very thin layers), polymers or etching residues (on masked substrates) on the surface has indeed a crippling effect on the quality of the epitaxy.

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